Fixed-delay reference and local evidence¶
The separate delay module and RavetDelayRouting.h export Delay8/Delay16 native
32/64 origins. Default AAX timing adoption uses f32. The explicit
internal precision adapter uses matching f64 candidates
behind host-f32 buffers, retaining the same ACK/adoption/retirement contract. Both have Level (0..1, default1) and
master Bypass (0/1, default0), complete RAVETDLY v1/32-byte global state, matching
mono/stereo main layout, at most1024 frames/events and no output events. Bypass skips
Level multiplication while retaining the fixed FIFO delay. Prepare/reset clear
FIFO; complete global recall preserves it. Their native tails are Samples(Delay).
Neither installs a public production AAX factory or an automatable latency control.
Target strict normal/fast timing and default Gain/Performance composition passes 6/6. Actual registered SDK Initialize→Rust Delay8/16 callbacks prove independent impulse offsets, old8 FIFO while pending without ACK, synchronous/deferred ACK, compensation transitions, exact statuses, candidate rejection, queued state order, late metadata rejection before adoption, original native failures and no old-core fallback. Repeated1000 pending and1000 adopted maximum1024-frame callbacks allocate and destroy zero C++ heap objects; CONTROL alone retires old native clients. Counters do not instrument Rust/host allocations or deadlines. Isolated Rust15 including delay/native/state/precision checks, release archive, warning-denied Clippy/Rustdoc and Python8 pass. A fresh full target external-SDK native Gain package composition passes32/32 and actual loaded-module exports/version/initialized mono/stereo contracts. Final mailbox normal/fast checks additionally prove the actual24-bit saturation boundary and20000 concurrent notices without lost ACKs. Actual held registered worker callbacks additionally prove setter/restore/lifecycle rejection without manager, SDK/native ownership or FIFO mutation and post-join acceptance. Public source is integrated after review; public qualification and shared gates remain pending. The receipts above qualify the isolated prototype.